Quantum Computing Architecture
A well-designed system architecture is essential for building a full-stack quantum computer capable of executing practical quantum algorithms with high fidelity. This includes scheduling physical-level gate operations, defining error correction policies, and transpiling quantum algorithms into the native gate set that can be implemented on real hardware. While these individual topics have been extensively studied by various research groups, the orchestration of these components has received comparatively less attention despite its critical importance.
Ion trap chip architecture optimized for quantum error correction
QuIQCL conducts research on the system architecture of large-scale trapped-ion quantum computers, considering various levels in the hierarchy of quantum computing architecture. The research spans a wide range of topics, including chip layout design, ion scheduling, logical qubit error management, and performance estimation for executing practical algorithms such as the Quantum Fourier Transform and Grover’s search algorithm. It also includes estimating the performance and resources, such as error rate of running algorithms, runtime, and number of qubits required. The work is uploaded on [arXiv:2501.15200].
